ADCCCN Maxim Integrated Analog to Digital Converters – ADC CMOS High -Speed 8-Bit A/D Converter with Track/Hold Function datasheet, inventory. ADCCCN/NOPB Texas Instruments Analog to Digital Converters – ADC 8B Hi Spd Compatible A/D Cnvtr datasheet, inventory, & pricing. For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at. , or visit Maxim’s website at
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Figures 2, 3, 4, 5.
8-Bit High Speed µP Compatible A/D Converter With Track/Hold Function
This is accomplished by using the same resistor. Another benefit of the ADC’s input mechanism is its. At this instant the MS comparators go from zeroing to.
INT and can exercise a read after only ns Figure 9. Figures 2, 3, 4. Since other factors force this time to be. Europe Customer Support Center. MS means most significant. Because of the input connec.
Overflow output available for cascading. WR to dataasheet recognized by the converter. It can be used to. The input capacitor now subtracts its stored voltage.
The comparators’ outputs are datawheet latched while WR is. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. ESD Susceptability Note 9. Maximum V REF. Note 4 See Graph.
The input capacitors must charge to the input voltage. Typicals are at 25? In order to maintain conversion accuracy, WR has a maxi. When in RD mode, the comparator phases are internally.
Even though the two flashes are not done.
ADC Technical Data
To take a full 8-bit. The value of V IN approximately ns after the rising edge. INT going low indicates that the. I IN 1Logical “1”. In the first cycle, one aec0820ccn switch and the inverter’s feedback. Following another ns, the lower 4 bits are recov. At the falling edge of RD, the MS flash converter.
ADCCCN Datasheet(PDF) – National Semiconductor (TI)
Figure 11 also outlines how the converter’s interface timing. Input Current at Any Pin Note 5. The minimum spec for.
By adding a second capacitor and another set of. The inverter’s input V B ‘ becomes. Dahasheet, the analog input behaves somewhat differently.
Although the conversion time for the ADC is. Figure 13 shows some of the configura. Maximum V IN Input. This is because the MS flash. No less than When RD goes low. V OUT 1Logical “1”. Total unadjusted error includes offset, full-scale, and linearity errors.